zephyr mcuboot使用笔记内容参考https://blog.csdn.net/weixin_44742767/article/details/158770644创建bootloader工程使用vscode workbench for zephyr创建工程创建完成如下工程添加板级信息1.修改默认设备树 zephyrproject\zephyr\boards\st\stm32f407_alientekstm32f407_alientek.dts加入zephyr,code-partition slot0_partition;flash0 {…};完整文件/* * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 *//dts-v1/;#includest/f4/stm32f407Xg.dtsi#includest/f4/stm32f407z(e-g)tx-pinctrl.dtsi#includezephyr/dt-bindings/input/input-event-codes.h/{modelSTMicroelectronics STM32F4DISCOVERY board;compatiblest,stm32f4discovery;chosen{zephyr,consoleusart1;zephyr,shell-uartusart1;zephyr,sramsram0;zephyr,flashflash0;zephyr,code-partitionslot0_partition;zephyr,dtcmccm0;zephyr,canbuscan2;zephyr,uart2usart2;/*与网口引脚冲突*/zephyr,uart3usart3;};leds{compatiblegpio-leds;/* red_led_0: led_0 { gpios gpiof 9 GPIO_ACTIVE_LOW; label User LD0; }; */green_led_1:led_1{gpiosgpiof10GPIO_ACTIVE_LOW;labelUser LD1;};};gpio_keys{compatiblegpio-keys;/*正点原子开发板按键低电平有效SoC内部上拉按键悬空时引脚被拉到高*/key_0:gpioe4_key{labelKey0;gpiosgpioe4(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_0;};key_1:gpioe3_key{labelKey1;gpiosgpioe3(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_1;};key_2:gpioe2_key{labelKey2;gpiosgpioe2(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_2;};};pwmleds:pwmleds{compatiblepwm-leds;red_pwm_led:pwm14_ch1_led{/*pwm14,channel1,周期100微秒,常规:占空比越大,高电平越长*/pwmspwm141PWM_USEC(100)PWM_POLARITY_NORMAL;};};aliases{led0red_pwm_led;/*红色led pwm输出*/led1green_led_1;/*绿色led gpio输出*/sw0key_0;/*按键0 gpio输入*/sw1key_1;sw2key_2;rtcrtc;die-temp0die_temp;volt-sensor0vref;volt-sensor1vbat;};zephyr,user{io-channelsadc15,adc35;};};clk_lsi{statusokay;};clk_hse{clock-frequencyDT_FREQ_M(8);statusokay;};pll{div-m8;mul-n336;div-p2;div-q7;clocksclk_hse;statusokay;};rcc{clockspll;clock-frequencyDT_FREQ_M(168);ahb-prescaler1;apb1-prescaler4;apb2-prescaler2;};// 扇区分布//Sector 0: 16 KB (0x0800_0000 - 0x0800_3FFF) ← 最小擦除单位//Sector 1: 16 KB (0x0800_4000 - 0x0800_7FFF)//Sector 2: 16 KB (0x0800_8000 - 0x0800_BFFF)//Sector 3: 16 KB (0x0800_C000 - 0x0800_FFFF)//Sector 4: 64 KB (0x0801_0000 - 0x0801_FFFF)//Sector 5: 128 KB (0x0802_0000 - 0x0803_FFFF) ← Slot 0 起始//Sector 6: 128 KB (0x0804_0000 - 0x0805_FFFF)//Sector 7: 128 KB (0x0806_0000 - 0x0807_FFFF) ← Slot 1 起始//Sector 8: 128 KB (0x0808_0000 - 0x0809_FFFF)//Sector 9: 128 KB (0x080A_0000 - 0x080B_FFFF) ← Scratch 起始//Sector 10: 128 KB (0x080C_0000 - 0x080D_FFFF)flash0{statusokay;partitions{compatiblefixed-partitions;#address-cells1;#size-cells1;boot_partition:partition0{labelmcuboot;reg0x00000000DT_SIZE_K(128);read-only;};slot0_partition:partition20000{labelimage-0;reg0x00020000DT_SIZE_K(256);};slot1_partition:partition60000{labelimage-1;reg0x00060000DT_SIZE_K(256);};scratch_partition:partitiona0000{labelimage-scratch;reg0x000A0000DT_SIZE_K(256);};};};usart1{pinctrl-0usart1_tx_pa9usart1_rx_pa10;pinctrl-namesdefault;current-speed115200;statusokay;};usart2{pinctrl-0usart2_tx_pa2usart2_rx_pa3;pinctrl-namesdefault;current-speed115200;statusokay;};usart3{pinctrl-0usart3_tx_pb10usart3_rx_pb11;pinctrl-namesdefault;current-speed115200;statusokay;};timers2{statusokay;pwm2:pwm{statusokay;pinctrl-0tim2_ch1_pa0;pinctrl-namesdefault;};};/* PF9红色LED灯使用PWM14输出 */timers14{statusokay;pwm14:pwm{statusokay;pinctrl-0tim14_ch1_pf9;pinctrl-namesdefault;};};rtc{clocksrccSTM32_CLOCK(APB1,28),rcc STM32_SRC_LSIRTC_SEL(2);statusokay;backup_regs{statusokay;};};zephyr_udc0:usbotg_fs{pinctrl-0usb_otg_fs_dm_pa11usb_otg_fs_dp_pa12;pinctrl-namesdefault;statusokay;};/*注意usb引脚复用pa11pa12*/can1{pinctrl-0can1_rx_pd0can1_tx_pd1;pinctrl-namesdefault;statusokay;};/*注意I2S引脚复用pb12pb13*/can2{pinctrl-0can2_rx_pb12can2_tx_pb13;pinctrl-namesdefault;statusokay;};adc1{#address-cells1;#size-cells0;pinctrl-0adc1_in5_pa5;/*注意网口使用pa1*/pinctrl-namesdefault;st,adc-prescaler2;st,adc-resolutions12;statusokay;channel5{reg5;/* 硬件通道号例如对应的 PA1 是 ADC1_IN1 */zephyr,gainADC_GAIN_1;/* 增益系数 1x */zephyr,referenceADC_REF_INTERNAL;/* 使用内部参考电压 (通常为 VREF) */zephyr,acquisition-timeADC_ACQ_TIME(ADC_ACQ_TIME_TICKS,480);zephyr,resolution12;/* 采样分辨率 12位 */};};adc3{#address-cells1;#size-cells0;pinctrl-0adc3_in5_pf7;/*接光敏电阻*/pinctrl-namesdefault;st,adc-prescaler4;statusokay;channel5{reg5;/* 硬件通道号例如对应的 PA1 是 ADC1_IN1 */zephyr,gainADC_GAIN_1;/* 增益系数 1x */zephyr,referenceADC_REF_INTERNAL;/* 使用内部参考电压 (通常为 VREF) */zephyr,acquisition-timeADC_ACQ_TIME_MAX;zephyr,resolution12;/* 采样分辨率 12位 */};};die_temp{statusokay;};vref{statusokay;};vbat{statusokay;};dma1{statusokay;};plli2s{/* Minimize audio clock error (with i2s mck-enabled) for all of: * - 22.05kHz / 16b, 24b or 32b * - 44.1kHz / 16b, 24b or 32b * - 88.2kHz / 16b or 24b * Note: because the PLLI2S is dependent on the main PLL, the latter * should not be changed without checking impact on PLLI2S */div-m8;mul-n271;div-r2;clocksclk_hse;statusokay;};i2s2{mck-enabled;pinctrl-0i2s2_ws_pb12i2s2_ck_pb13i2s2_sd_pc3i2s2_mck_pc6;//PC2 I2S_SDOUTpinctrl-namesdefault;clocksrccSTM32_CLOCK(APB1,15),rcc STM32_SRC_PLLI2S_RI2S_SEL(0);statusokay;wm8978:wm89780{compatiblewlf,wm8978;reg0;/* I2S 设备索引一般从 0 开始 */statusokay;};};i2c1{pinctrl-0i2c1_scl_pb8i2c1_sda_pb9;pinctrl-namesdefault;clock-frequencyI2C_BITRATE_STANDARD;statusokay;eeprom0:eeprom50{compatibleatmel,at24c02,atmel,at24;/*at24c02*/reg0x50;size256;pagesize8;address-width8;timeout5;};};//sdio_d0_pc8 sdio_d1_pc9 sdio_d2_pc10 sdio_d3_pc11 sdio_ck_pc12 sdio_cmd_pd2sdmmc1{statusokay;pinctrl-0sdio_d0_pc8sdio_d1_pc9sdio_d2_pc10sdio_d3_pc11sdio_ck_pc12sdio_cmd_pd2;pinctrl-namesdefault;disk-nameSD;bus-width4;clk-div4;/*解决日志出现stm32_sdmmc: sd read error 36*/};// spi1 {// status okay;// /*PB3/PB4 和 JTAG 复用jlink调试受影响 spi1_nss_pb14 片选*/// pinctrl-0 spi1_sck_pb3// spi1_miso_pb4// spi1_mosi_pb5;// pinctrl-names default;// cs-gpios gpiob 14 GPIO_ACTIVE_LOW;// w25q128: w25q1280 {// compatible jedec,spi-nor;// reg 0;// spi-max-frequency 4000000;// size 0x8000000;// jedec-id [ef 40 18];// };// };mac{statusokay;/* 1. 明确声明 MAC 与 PHY 的连接类型LAN8720 选 rmii */phy-connection-typermii;/* 2. 指向你在 mdio 子节点中定义的 PHY 节点的标签名 */phy-handleethernet_phy;/*定义文件在\modules\hal\stm32\dts\st\f4\stm32f407z(e-g)tx-pinctrl.dtsi*/pinctrl-0eth_ref_clk_pa1eth_crs_dv_pa7eth_rxd0_pc4eth_rxd1_pc5eth_tx_en_pg11eth_txd0_pg13eth_txd1_pg14;pinctrl-namesdefault;/* 绑定 MDIO 总线 */mdio{statusokay;pinctrl-0eth_mdc_pc1eth_mdio_pa2;pinctrl-namesdefault;/* 注意此处的标签名 ethernet_phy 要与上方的 phy-handle 严格一致 *//* LAN8720 PHY 节点配置 */ethernet_phy:ethernet-phy0{compatibleethernet-phy;reg0;/* LAN8720 的 PHY 地址通常为 0 或 1根据硬件引脚 PHYAD0 决定 */statusokay;/* 加入以下复位引脚配置 *//* 下方复位配置不起作用但使用pd3做输出时却可以复位。解决方法工程添加配置 CONFIG_NET_L2_ETHERNETy *//* GPIO_ACTIVE_LOW 对应 LAN8720 的低电平复位特性 */reset-gpiosgpiod3GPIO_ACTIVE_LOW;/* 可选复位延时参数单位微秒 *//* LAN8720 要求复位低电平至少维持 100微秒(us)这里给 50ms足以让 LAN8720 彻底清醒 */reset-assert-duration-us50000;};};};2.添加bootloader工程板级配置zephyrproject\bootloader\mcuboot\boot\zephyr\boards增加 stm32f407_alientek.overlay/{chosen{zephyr,code-partitionboot_partition;};};增加 stm32f407_alientek.conf# 禁用自动计算手动设置最大镜像扇区数根据你的分区大小调整 CONFIG_BOOT_MAX_IMG_SECTORS_AUTOn CONFIG_BOOT_MAX_IMG_SECTORS16CONFIG_LOGy CONFIG_MCUBOOT_LOG_LEVEL_DBGy3.编译bootloader工程烧录。日志[Rx][10:59:27.394] *** Using Zephyr OS build v4.4.0-5153-gb54e0ba58fde ***I: Starting bootloaderD: context_boot_goI: Primary image: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Scratch: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Boot source: primary slotI: Image index: 0, Swap type: noneD: boot_validate_slot: slot 0, expected_swap_type 0D: Left boot_go with success 0E: Unable to find bootable image创建app工程参考以前的文章不再详细说明。1.修改工程配置#Enable Zephyr application to be booted by MCUbootCONFIG_BOOTLOADER_MCUBOOTy#CONFIG_BOOT_UPGRADE_ONLYy #当 mcuboot 发现 slot1 里有新固件时直接把新固件覆盖到 slot0 并运行不需要做可回滚升级#Use thedefaultMCUBoot PEM keyfile(BOOT_SIGNATURE_KEY_FILE)CONFIG_MCUBOOT_SIGNATURE_KEY_FILEbootloader/mcuboot/root-rsa-2048.pem2.修改vscode launch脚本3.编译烧录。4.日志[Rx][11:01:07.923] *** Using Zephyr OS build v4.4.0-5153-gb54e0ba58fde ***I: Starting bootloaderD: context_boot_goI: Primary image: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Scratch: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Boot source: primary slotI: Image index: 0, Swap type: noneD: boot_validate_slot: slot 0, expected_swap_type 0D: bootutil_img_validate: flash area 0x800837cD: bootutil_img_hash[Rx][11:01:08.094] D: bootutil_tlv_iter_begin: type 65535, prot 0D: bootutil_img_validate: TLV off 217780, end 218112D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217780 ending at 218112D: bootutil_tlv_iter_next: TLV 16 found at 217784 (size 32)D: bootutil_img_validate: EXPECTED_HASH_TLV 16D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217816 ending at 218112D: bootutil_tlv_iter_next: TLV 1 found at 217820 (size 32)D: bootutil_img_validate: EXPECTED_KEY_TLV 1D: bootutil_find_keyD: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217852 ending at 218112D: bootutil_tlv_iter_next: TLV 32 found at 217856 (size 256)D: bootutil_img_validate: EXPECTED_SIG_TLV 32D: bootutil_verify_sig: RSA key_id 0[Rx][11:01:08.214] D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 218112 ending at 218112D: bootutil_tlv_iter_next: TLV 65535 not foundD: Left boot_go with success 1I: Bootloader chainload address offset: 0x20000I: Image version: v0.0.0[Rx][11:01:08.237]I: Jumping to the first image slot
zephyr mcuboot使用笔记内容参考https://blog.csdn.net/weixin_44742767/article/details/158770644创建bootloader工程使用vscode workbench for zephyr创建工程创建完成如下工程添加板级信息1.修改默认设备树 zephyrproject\zephyr\boards\st\stm32f407_alientekstm32f407_alientek.dts加入zephyr,code-partition slot0_partition;flash0 {…};完整文件/* * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 *//dts-v1/;#includest/f4/stm32f407Xg.dtsi#includest/f4/stm32f407z(e-g)tx-pinctrl.dtsi#includezephyr/dt-bindings/input/input-event-codes.h/{modelSTMicroelectronics STM32F4DISCOVERY board;compatiblest,stm32f4discovery;chosen{zephyr,consoleusart1;zephyr,shell-uartusart1;zephyr,sramsram0;zephyr,flashflash0;zephyr,code-partitionslot0_partition;zephyr,dtcmccm0;zephyr,canbuscan2;zephyr,uart2usart2;/*与网口引脚冲突*/zephyr,uart3usart3;};leds{compatiblegpio-leds;/* red_led_0: led_0 { gpios gpiof 9 GPIO_ACTIVE_LOW; label User LD0; }; */green_led_1:led_1{gpiosgpiof10GPIO_ACTIVE_LOW;labelUser LD1;};};gpio_keys{compatiblegpio-keys;/*正点原子开发板按键低电平有效SoC内部上拉按键悬空时引脚被拉到高*/key_0:gpioe4_key{labelKey0;gpiosgpioe4(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_0;};key_1:gpioe3_key{labelKey1;gpiosgpioe3(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_1;};key_2:gpioe2_key{labelKey2;gpiosgpioe2(GPIO_PULL_UP|GPIO_ACTIVE_LOW);zephyr,codeINPUT_KEY_2;};};pwmleds:pwmleds{compatiblepwm-leds;red_pwm_led:pwm14_ch1_led{/*pwm14,channel1,周期100微秒,常规:占空比越大,高电平越长*/pwmspwm141PWM_USEC(100)PWM_POLARITY_NORMAL;};};aliases{led0red_pwm_led;/*红色led pwm输出*/led1green_led_1;/*绿色led gpio输出*/sw0key_0;/*按键0 gpio输入*/sw1key_1;sw2key_2;rtcrtc;die-temp0die_temp;volt-sensor0vref;volt-sensor1vbat;};zephyr,user{io-channelsadc15,adc35;};};clk_lsi{statusokay;};clk_hse{clock-frequencyDT_FREQ_M(8);statusokay;};pll{div-m8;mul-n336;div-p2;div-q7;clocksclk_hse;statusokay;};rcc{clockspll;clock-frequencyDT_FREQ_M(168);ahb-prescaler1;apb1-prescaler4;apb2-prescaler2;};// 扇区分布//Sector 0: 16 KB (0x0800_0000 - 0x0800_3FFF) ← 最小擦除单位//Sector 1: 16 KB (0x0800_4000 - 0x0800_7FFF)//Sector 2: 16 KB (0x0800_8000 - 0x0800_BFFF)//Sector 3: 16 KB (0x0800_C000 - 0x0800_FFFF)//Sector 4: 64 KB (0x0801_0000 - 0x0801_FFFF)//Sector 5: 128 KB (0x0802_0000 - 0x0803_FFFF) ← Slot 0 起始//Sector 6: 128 KB (0x0804_0000 - 0x0805_FFFF)//Sector 7: 128 KB (0x0806_0000 - 0x0807_FFFF) ← Slot 1 起始//Sector 8: 128 KB (0x0808_0000 - 0x0809_FFFF)//Sector 9: 128 KB (0x080A_0000 - 0x080B_FFFF) ← Scratch 起始//Sector 10: 128 KB (0x080C_0000 - 0x080D_FFFF)flash0{statusokay;partitions{compatiblefixed-partitions;#address-cells1;#size-cells1;boot_partition:partition0{labelmcuboot;reg0x00000000DT_SIZE_K(128);read-only;};slot0_partition:partition20000{labelimage-0;reg0x00020000DT_SIZE_K(256);};slot1_partition:partition60000{labelimage-1;reg0x00060000DT_SIZE_K(256);};scratch_partition:partitiona0000{labelimage-scratch;reg0x000A0000DT_SIZE_K(256);};};};usart1{pinctrl-0usart1_tx_pa9usart1_rx_pa10;pinctrl-namesdefault;current-speed115200;statusokay;};usart2{pinctrl-0usart2_tx_pa2usart2_rx_pa3;pinctrl-namesdefault;current-speed115200;statusokay;};usart3{pinctrl-0usart3_tx_pb10usart3_rx_pb11;pinctrl-namesdefault;current-speed115200;statusokay;};timers2{statusokay;pwm2:pwm{statusokay;pinctrl-0tim2_ch1_pa0;pinctrl-namesdefault;};};/* PF9红色LED灯使用PWM14输出 */timers14{statusokay;pwm14:pwm{statusokay;pinctrl-0tim14_ch1_pf9;pinctrl-namesdefault;};};rtc{clocksrccSTM32_CLOCK(APB1,28),rcc STM32_SRC_LSIRTC_SEL(2);statusokay;backup_regs{statusokay;};};zephyr_udc0:usbotg_fs{pinctrl-0usb_otg_fs_dm_pa11usb_otg_fs_dp_pa12;pinctrl-namesdefault;statusokay;};/*注意usb引脚复用pa11pa12*/can1{pinctrl-0can1_rx_pd0can1_tx_pd1;pinctrl-namesdefault;statusokay;};/*注意I2S引脚复用pb12pb13*/can2{pinctrl-0can2_rx_pb12can2_tx_pb13;pinctrl-namesdefault;statusokay;};adc1{#address-cells1;#size-cells0;pinctrl-0adc1_in5_pa5;/*注意网口使用pa1*/pinctrl-namesdefault;st,adc-prescaler2;st,adc-resolutions12;statusokay;channel5{reg5;/* 硬件通道号例如对应的 PA1 是 ADC1_IN1 */zephyr,gainADC_GAIN_1;/* 增益系数 1x */zephyr,referenceADC_REF_INTERNAL;/* 使用内部参考电压 (通常为 VREF) */zephyr,acquisition-timeADC_ACQ_TIME(ADC_ACQ_TIME_TICKS,480);zephyr,resolution12;/* 采样分辨率 12位 */};};adc3{#address-cells1;#size-cells0;pinctrl-0adc3_in5_pf7;/*接光敏电阻*/pinctrl-namesdefault;st,adc-prescaler4;statusokay;channel5{reg5;/* 硬件通道号例如对应的 PA1 是 ADC1_IN1 */zephyr,gainADC_GAIN_1;/* 增益系数 1x */zephyr,referenceADC_REF_INTERNAL;/* 使用内部参考电压 (通常为 VREF) */zephyr,acquisition-timeADC_ACQ_TIME_MAX;zephyr,resolution12;/* 采样分辨率 12位 */};};die_temp{statusokay;};vref{statusokay;};vbat{statusokay;};dma1{statusokay;};plli2s{/* Minimize audio clock error (with i2s mck-enabled) for all of: * - 22.05kHz / 16b, 24b or 32b * - 44.1kHz / 16b, 24b or 32b * - 88.2kHz / 16b or 24b * Note: because the PLLI2S is dependent on the main PLL, the latter * should not be changed without checking impact on PLLI2S */div-m8;mul-n271;div-r2;clocksclk_hse;statusokay;};i2s2{mck-enabled;pinctrl-0i2s2_ws_pb12i2s2_ck_pb13i2s2_sd_pc3i2s2_mck_pc6;//PC2 I2S_SDOUTpinctrl-namesdefault;clocksrccSTM32_CLOCK(APB1,15),rcc STM32_SRC_PLLI2S_RI2S_SEL(0);statusokay;wm8978:wm89780{compatiblewlf,wm8978;reg0;/* I2S 设备索引一般从 0 开始 */statusokay;};};i2c1{pinctrl-0i2c1_scl_pb8i2c1_sda_pb9;pinctrl-namesdefault;clock-frequencyI2C_BITRATE_STANDARD;statusokay;eeprom0:eeprom50{compatibleatmel,at24c02,atmel,at24;/*at24c02*/reg0x50;size256;pagesize8;address-width8;timeout5;};};//sdio_d0_pc8 sdio_d1_pc9 sdio_d2_pc10 sdio_d3_pc11 sdio_ck_pc12 sdio_cmd_pd2sdmmc1{statusokay;pinctrl-0sdio_d0_pc8sdio_d1_pc9sdio_d2_pc10sdio_d3_pc11sdio_ck_pc12sdio_cmd_pd2;pinctrl-namesdefault;disk-nameSD;bus-width4;clk-div4;/*解决日志出现stm32_sdmmc: sd read error 36*/};// spi1 {// status okay;// /*PB3/PB4 和 JTAG 复用jlink调试受影响 spi1_nss_pb14 片选*/// pinctrl-0 spi1_sck_pb3// spi1_miso_pb4// spi1_mosi_pb5;// pinctrl-names default;// cs-gpios gpiob 14 GPIO_ACTIVE_LOW;// w25q128: w25q1280 {// compatible jedec,spi-nor;// reg 0;// spi-max-frequency 4000000;// size 0x8000000;// jedec-id [ef 40 18];// };// };mac{statusokay;/* 1. 明确声明 MAC 与 PHY 的连接类型LAN8720 选 rmii */phy-connection-typermii;/* 2. 指向你在 mdio 子节点中定义的 PHY 节点的标签名 */phy-handleethernet_phy;/*定义文件在\modules\hal\stm32\dts\st\f4\stm32f407z(e-g)tx-pinctrl.dtsi*/pinctrl-0eth_ref_clk_pa1eth_crs_dv_pa7eth_rxd0_pc4eth_rxd1_pc5eth_tx_en_pg11eth_txd0_pg13eth_txd1_pg14;pinctrl-namesdefault;/* 绑定 MDIO 总线 */mdio{statusokay;pinctrl-0eth_mdc_pc1eth_mdio_pa2;pinctrl-namesdefault;/* 注意此处的标签名 ethernet_phy 要与上方的 phy-handle 严格一致 *//* LAN8720 PHY 节点配置 */ethernet_phy:ethernet-phy0{compatibleethernet-phy;reg0;/* LAN8720 的 PHY 地址通常为 0 或 1根据硬件引脚 PHYAD0 决定 */statusokay;/* 加入以下复位引脚配置 *//* 下方复位配置不起作用但使用pd3做输出时却可以复位。解决方法工程添加配置 CONFIG_NET_L2_ETHERNETy *//* GPIO_ACTIVE_LOW 对应 LAN8720 的低电平复位特性 */reset-gpiosgpiod3GPIO_ACTIVE_LOW;/* 可选复位延时参数单位微秒 *//* LAN8720 要求复位低电平至少维持 100微秒(us)这里给 50ms足以让 LAN8720 彻底清醒 */reset-assert-duration-us50000;};};};2.添加bootloader工程板级配置zephyrproject\bootloader\mcuboot\boot\zephyr\boards增加 stm32f407_alientek.overlay/{chosen{zephyr,code-partitionboot_partition;};};增加 stm32f407_alientek.conf# 禁用自动计算手动设置最大镜像扇区数根据你的分区大小调整 CONFIG_BOOT_MAX_IMG_SECTORS_AUTOn CONFIG_BOOT_MAX_IMG_SECTORS16CONFIG_LOGy CONFIG_MCUBOOT_LOG_LEVEL_DBGy3.编译bootloader工程烧录。日志[Rx][10:59:27.394] *** Using Zephyr OS build v4.4.0-5153-gb54e0ba58fde ***I: Starting bootloaderD: context_boot_goI: Primary image: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Scratch: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Boot source: primary slotI: Image index: 0, Swap type: noneD: boot_validate_slot: slot 0, expected_swap_type 0D: Left boot_go with success 0E: Unable to find bootable image创建app工程参考以前的文章不再详细说明。1.修改工程配置#Enable Zephyr application to be booted by MCUbootCONFIG_BOOTLOADER_MCUBOOTy#CONFIG_BOOT_UPGRADE_ONLYy #当 mcuboot 发现 slot1 里有新固件时直接把新固件覆盖到 slot0 并运行不需要做可回滚升级#Use thedefaultMCUBoot PEM keyfile(BOOT_SIGNATURE_KEY_FILE)CONFIG_MCUBOOT_SIGNATURE_KEY_FILEbootloader/mcuboot/root-rsa-2048.pem2.修改vscode launch脚本3.编译烧录。4.日志[Rx][11:01:07.923] *** Using Zephyr OS build v4.4.0-5153-gb54e0ba58fde ***I: Starting bootloaderD: context_boot_goI: Primary image: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Scratch: magicunset, swap_type0x1, copy_done0x3, image_ok0x3I: Boot source: primary slotI: Image index: 0, Swap type: noneD: boot_validate_slot: slot 0, expected_swap_type 0D: bootutil_img_validate: flash area 0x800837cD: bootutil_img_hash[Rx][11:01:08.094] D: bootutil_tlv_iter_begin: type 65535, prot 0D: bootutil_img_validate: TLV off 217780, end 218112D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217780 ending at 218112D: bootutil_tlv_iter_next: TLV 16 found at 217784 (size 32)D: bootutil_img_validate: EXPECTED_HASH_TLV 16D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217816 ending at 218112D: bootutil_tlv_iter_next: TLV 1 found at 217820 (size 32)D: bootutil_img_validate: EXPECTED_KEY_TLV 1D: bootutil_find_keyD: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 217852 ending at 218112D: bootutil_tlv_iter_next: TLV 32 found at 217856 (size 256)D: bootutil_img_validate: EXPECTED_SIG_TLV 32D: bootutil_verify_sig: RSA key_id 0[Rx][11:01:08.214] D: bootutil_tlv_iter_next: searching for 65535 (65535 is any) starting at 218112 ending at 218112D: bootutil_tlv_iter_next: TLV 65535 not foundD: Left boot_go with success 1I: Bootloader chainload address offset: 0x20000I: Image version: v0.0.0[Rx][11:01:08.237]I: Jumping to the first image slot
