![verilog HDLBits刷题[Finding bugs in code]“Bugs mux4”---Mux](http://pic.xiahunao.cn/yaotu/verilog HDLBits刷题[Finding bugs in code]“Bugs mux4”---Mux)
1、题目This 4-to-1 multiplexer doesnt work. Fix the bug(s).You are provided with a bug-free 2-to-1 multiplexer:module mux2 ( input sel, input [7:0] a, input [7:0] b, output [7:0] out );2、分析3、代码module top_module ( input [1:0] sel, input [7:0] a, input [7:0] b, input [7:0] c, input [7:0] d, output [7:0] out ); // wire [7:0]out1, out2; mux2 mux2_0_inst ( sel[0], a, b, out1 ); mux2 mux2_1_inst ( sel[0], c, d, out2 ); mux2 mux2_2_inst ( sel[1], out1, out2, out ); endmodule4、结果
1、题目This 4-to-1 multiplexer doesnt work. Fix the bug(s).You are provided with a bug-free 2-to-1 multiplexer:module mux2 ( input sel, input [7:0] a, input [7:0] b, output [7:0] out );2、分析3、代码module top_module ( input [1:0] sel, input [7:0] a, input [7:0] b, input [7:0] c, input [7:0] d, output [7:0] out ); // wire [7:0]out1, out2; mux2 mux2_0_inst ( sel[0], a, b, out1 ); mux2 mux2_1_inst ( sel[0], c, d, out2 ); mux2 mux2_2_inst ( sel[1], out1, out2, out ); endmodule4、结果
